\doxysubsubsubsection{SPI3 Clock Source }
\hypertarget{group___r_c_c_ex___s_p_i3___clock___source}{}\label{group___r_c_c_ex___s_p_i3___clock___source}\index{SPI3 Clock Source@{SPI3 Clock Source}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\Hypertarget{group___r_c_c_ex___s_p_i3___clock___source_ga28eb10fd2a3aaa1908d98e842047dca1}\label{group___r_c_c_ex___s_p_i3___clock___source_ga28eb10fd2a3aaa1908d98e842047dca1} 
\#define {\bfseries RCC\+\_\+\+SPI3\+CLKSOURCE\+\_\+\+PLL}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+PLL
\item 
\Hypertarget{group___r_c_c_ex___s_p_i3___clock___source_ga47f80135cee4c3b26bf5d099b9cecedf}\label{group___r_c_c_ex___s_p_i3___clock___source_ga47f80135cee4c3b26bf5d099b9cecedf} 
\#define {\bfseries RCC\+\_\+\+SPI3\+CLKSOURCE\+\_\+\+PLL2}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+PLL2
\item 
\Hypertarget{group___r_c_c_ex___s_p_i3___clock___source_ga20cff64231c802fb2dc88dd9df16bbe1}\label{group___r_c_c_ex___s_p_i3___clock___source_ga20cff64231c802fb2dc88dd9df16bbe1} 
\#define {\bfseries RCC\+\_\+\+SPI3\+CLKSOURCE\+\_\+\+PLL3}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+PLL3
\item 
\Hypertarget{group___r_c_c_ex___s_p_i3___clock___source_gadeb3dafe4df8cd027201ff60e3e843be}\label{group___r_c_c_ex___s_p_i3___clock___source_gadeb3dafe4df8cd027201ff60e3e843be} 
\#define {\bfseries RCC\+\_\+\+SPI3\+CLKSOURCE\+\_\+\+PIN}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+PIN
\item 
\Hypertarget{group___r_c_c_ex___s_p_i3___clock___source_ga01f9c4bb736322fb0dba77a5fdfc6453}\label{group___r_c_c_ex___s_p_i3___clock___source_ga01f9c4bb736322fb0dba77a5fdfc6453} 
\#define {\bfseries RCC\+\_\+\+SPI3\+CLKSOURCE\+\_\+\+CLKP}~RCC\+\_\+\+SPI123\+CLKSOURCE\+\_\+\+CLKP
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}
